FIELD: computer engineering. SUBSTANCE: device has three processors with memory units, input-output unit and unit for microprogram control. read-only memory unit and commutators are introduced to reduce time of execution of interval arithmetic operations. Second and third memory units are connected to second and third processors through commutators which control inputs are connected to outputs of read-only memory unit. Address inputs of read-only memory unit are connected to outputs of two shift registers which are introduced into first processor and which inputs are connected to outputs of arithmetic-logic unit. Commutators, which inputs are connected to outputs of local memory unit and which outputs are connected to input of arithmetic-logic unit, are introduced in third and second processors. Interval arithmetic is implemented due design of control of commutators. Second and third processors compute lower and upper limits of precise result of computation correspondingly. EFFECT: increased functional capabilities and increased precision. 4 dwg
Title | Year | Author | Number |
---|---|---|---|
COMPUTING SYSTEM | 1991 |
|
RU2042193C1 |
0 |
|
SU435527A1 | |
PROCESSOR | 0 |
|
SU1246108A1 |
COMPUTING DEVICE WITH OVERLAPPED OPERATIONS | 0 |
|
SU1716528A1 |
COMPUTING SYSTEM | 0 |
|
SU1777148A1 |
CONTROL VECTOR COMPUTER SYSTEM | 0 |
|
SU1120340A1 |
MICROPROGRAMME PROCESSOR | 0 |
|
SU741269A1 |
INFORMATION PROCESSING DEVICE | 0 |
|
SU1451710A1 |
FIRMWARE PROCESSOR | 0 |
|
SU1070557A1 |
PROCESSOR | 0 |
|
SU670935A1 |
Authors
Dates
1994-01-30—Published
1991-02-11—Filed