FIELD: automation and computer engineering. SUBSTANCE: device has nxn of computing units, where n is rows or columns in processed matrices. Each computing unit has registers 3, 4, 9, 11, multiplier 5, OR gates 6, 8, adder 7, AND gates 10, 12, 13, flip-flop 14. EFFECT: simplified design. 2 dwg
Title | Year | Author | Number |
---|---|---|---|
APPLIANCE FOR MATRIX MULTIPLICATION | 0 |
|
SU1835548A1 |
DEVICE FOR MULTIPLICATION OF MATRICES | 0 |
|
SU1839262A1 |
DEVICE FOR MULTIPLYING MATRIXES | 0 |
|
SU1801224A3 |
DEVICE FOR TRIANGULAR DECOMPOSITION OF RIBBON MATRIX | 0 |
|
SU1587540A1 |
DEVICE FOR PERFORMING OPERATIONS ON MATRICES | 0 |
|
SU1741153A1 |
DEVICE FOR OPERATION ON MATRICES | 0 |
|
SU1575205A1 |
DEVICE FOR OPERATIONS OVER MATRIXES | 0 |
|
SU1802363A1 |
0 |
|
SU1777154A1 | |
MATRIX MULTIPLIER | 0 |
|
SU1705836A1 |
DEVICE FOR FAST FOURIER TRANSFORM | 0 |
|
SU1206802A1 |
Authors
Dates
1994-01-30—Published
1990-10-19—Filed