MODULO 3 CONVOLUTING DEVICE Russian patent published in 1994 - IPC

FIELD: computer technology. SUBSTANCE: device has control flip-flop 1 which regulates operation of AND gate 2 and multiplexer 5. AND gate 2 passes in odd clock period the value of carry from adder 4 to information input of the first flip-flop 3. Flip-flop 3 is used for storing carries from odd digits of the results of adder 4, the flip-flop helps to delay the caries for one clock. Adder 4 which sums ordinary digit of the number to be convoluted with contents of the first flip-flop 3 and with digit of the sum computed by half adder 8. Multiplexer 5 commutates to information input of the second flip-flop 7 the value of carry from adder 4 in even clock period, in odd clock period - value of carry from adder 4. Two digit shift register 6 is used for storing digits of the sum calculated by adder 4; register 6 helps to delay the digits for two clocks. The second flip-flop 7 memorizes values in the output of multiplexer 5; flip-flop 7 helps to delay these values for a clock. Half adder 8 sums digit of the sum from adder 4, delayed for two clocks as well as contents of the second flip-flop 7; half adder 8 produces in its outputs sums in (i+1)-th and (i+2)-th clocks periods correspondingly the first and the second digits modulo 3 of the control code, which entered input of the device of i-th digits of the number to be convoluted (binary number); i= 1, n, where n is odd number and has to be the capacity of binary number. EFFECT: production of control codes of the parts of convoluted number as it enters in sequent code. 2 dwg