FIELD: computer technology. SUBSTANCE: device has n models of vertexes (n is the number of vertexes in graph under testing), contiguity array setting unit made of n(n-1) models of arcs, group of AND gates and group of OR gates. Arc model has flip-flop, AND gate and diode. Operation of the device when determining Gk(Q) and Q ⊂ X is carried out for K steps. In the first step G(Q) is determined, in the second step Q2(Q) is measured and so on. In order to determine reverse correspondences G-k(Q) the transposed contiguity array of the graph under test is introduced into contiguity array setting unit. EFFECT: improved precision. 1 dwg
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DEVICE FOR ANALYSIS OF GRAPH CONNECTIVITY | 1991 |
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Authors
Dates
1994-04-15—Published
1991-04-17—Filed