CONTROLLED DELAY LINE Russian patent published in 1994 - IPC

FIELD: radio electronics. SUBSTANCE: controlled delay line has first, second, third and fourth MIS transistors in each element of it. Input of first element is connected to input and output of last element is coupled to output of controlled delay line. Delay line has second and first supply wires. Input of following delay element is connected to output of preceding delay element. In each element gates of transistors of different types conduction are connected to input and drains to output. Gate of transistors is coupled to controlling input. In each odd element transistors of second type of conduction are placed in parallel between wire and source of transistor of second type of conduction. gate of transistor of second type of conduction and source of transistor of first type of conduction are coupled to wire. In each even element transistors of first type of conduction are placed in parallel between wire and source of transistor of first type of conduction and of transistor of first type of conduction and source of transistor of second type of conduction are connected to wire. EFFECT: simplified design, improved operational characteristics. 1 dwg