FIELD: computer engineering. SUBSTANCE: device has m n-bit adders 1 (m is odd number, n is even number), four modulo 2 convolution units 2-5, two comparison circuits 8, 9, and newly introduced fifth and sixth modulo 2 convolution units 6, 7 with appropriate ties. EFFECT: improved speed of parity check dividers. 4 dwg
Title | Year | Author | Number |
---|---|---|---|
DIVIDING DEVICE | 0 |
|
SU1667077A1 |
DIVIDER | 0 |
|
SU1721603A1 |
0 |
|
SU1784974A1 | |
DIVIDING DEVICE | 0 |
|
SU1633395A1 |
DEVICE FOR DIVIDING NUMBERS | 0 |
|
SU1119006A1 |
DEVICE FOR DIVIDING NUMBERS | 0 |
|
SU1056183A1 |
DIVIDER | 0 |
|
SU1681303A1 |
DIVIDER | 1991 |
|
RU2018934C1 |
DIVIDER | 1991 |
|
RU2018933C1 |
PARITY-CHECK DIVIDER | 0 |
|
SU1772802A1 |
Authors
Dates
1994-10-15—Published
1991-07-15—Filed