FIELD: computer engineering. SUBSTANCE: device has n single-bit amplifying units 1 (n is multiplicand length), two groups of n buffer registers 2, 3, n first-group combination adders 4, (n+1) second-group combination adders 5, and newly introduced (n+1) intermediate-result registers 6, n carry flip-flops 7, (n-1) switches 8, and correction shaping unit 9 with relevant ties. EFFECT: reduced hardware expenses, enlarged functional capabilities of device due to provision for multiplying both signless numbers and those signed. 4 dwg
Title | Year | Author | Number |
---|---|---|---|
FAILURE-RESISTANT MULTIPLIER | 1991 |
|
RU2021631C1 |
DEVICE FOR MULTIPLICATION | 0 |
|
SU1807481A1 |
MULTIPLICATION DEVICE | 0 |
|
SU1667061A1 |
MULTIPLICATION DEVICE | 0 |
|
SU1529216A1 |
MULTIPLIER | 0 |
|
SU1654814A2 |
DEVICE FOR MULTIPLICATION OF NUMBERS | 0 |
|
SU1797112A1 |
DEVICE FOR MULTIPLYING NUMBERS | 0 |
|
SU1575173A1 |
DIVIDER | 1991 |
|
RU2018934C1 |
MULTIPLIER | 0 |
|
SU1658147A1 |
MULTIPLYING DEVICE | 0 |
|
SU1803914A1 |
Authors
Dates
1994-10-15—Published
1991-07-10—Filed