FIELD: computer engineering. SUBSTANCE: device has first matrix having n memory locations, second matrix having (n-1) computing units, nth computing unit. In addition device has additional computing unit with number (n+1). This computing unit provides possibility to perform squaring and accumulating addition. Nth computing unit has additional adder and four multiplexers. EFFECT: increased functional capabilities. 3 cl, 6 dwg
Title | Year | Author | Number |
---|---|---|---|
DEVICE FOR PERFORMING OPERATIONS ON MATRICES | 0 |
|
SU1737462A1 |
DEVICE FOR CALCULATING LINEAR ALGEBRAIC TRIANGULAR-MATRIX EQUATIONS | 0 |
|
SU1803921A1 |
DIGITAL SIGNAL PROCESSING DEVICE | 1991 |
|
RU2033637C1 |
UNIFORM SWITCHING STRUCTURE | 1991 |
|
RU2033635C1 |
DEVICE FOR MATRIX OPERATION PERFORMING | 0 |
|
SU1800462A1 |
DEVICE FOR COMPUTING FUNCTION EXPANSION COEFFICIENTS | 0 |
|
SU1824641A1 |
CONVEYOR ADDER | 0 |
|
SU1795454A1 |
SYSTOLIC PROCESSOR FOR TWO-DIMENSIONAL DISCRETE FOURIER TRANSFORM | 0 |
|
SU1608688A1 |
DEVICE FOR MULTIPLICATION OF MATRICES | 0 |
|
SU1585804A1 |
DEVICE FOR DISCRETE ORTHOGONAL CONVERSION | 0 |
|
SU1399764A1 |
Authors
Dates
1995-06-09—Published
1991-08-16—Filed