FIELD: computer engineering. SUBSTANCE: device has two registers 1 and 2, two NOT-EQUAL gates 3 and 4, commutator 5 and 6, direct-to-complement code converters 7, 8, 10, adder 9, NOT gate 11, group n of AND gates C1= A+B, C2= A-B, C3= B-A, C4= A+B, C5= A-B, C6= B-A, group of n AND gates I1= min(1,1-A+B) (where n is bit length of operands), commutator 14, data inputs 15 and 16, data write permission input 17, control inputs 18-21, result sign output 22, result output 23, result absolute value output 24, logical operations result output 25. In addition to possibility of implementation of fuzzy functions I2= min(1,1-B+A), device implements such fuzzy logic functions as disjunction D min (1, A+B), implication 121-12n min (1, 1-A+B), implication 131-13n min( 1, 1-B+A), Sheffer stroke symbol S min( 1, 1-A+1-B), difference Q max (0, A-B), conjunction K max( 0, A+B-1), Pierce's arrow P max(0, 1-A-B). EFFECT: increased functional capabilities. 1 dwg
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Authors
Dates
1995-08-20—Published
1992-08-28—Filed