VECTOR ACCELERATOR Russian patent published in 1995 - IPC

FIELD: computer engineering. SUBSTANCE: device has control unit, which is connected to unit for generation of addresses. The latter contains group of three address units. Random-access memory unit serves for storing input vectors and results of operations. Number of address units determines speed of memory unit. Arithmetic unit contains input registers, arithmetic-logical unit having multiple inputs, and output register. Number of input registers and number of inputs of arithmetic-logical unit is equal to number of address units. Arithmetic-logical unit performs three following operations during one cycle: two reading and one storing. EFFECT: increased speed. 3 cl, 4 dwg