FIELD: computer engineering. SUBSTANCE: device has m computing units (m is fixed integer, ≅, T is dimension of matrix of result Y[I,J]), n registers, where n P (Q+I) 2m (P and Q is dimension of input matrix X[P,Q]), three groups of flip-flops 91-9n, 101-10n, 111-11n, group of OR gates 12, three OR gates 13, 14, 15. Computing unit has thirteen groups of AND gates, seven AND gates, six groups of OR gates, seven OR gates, five registers, group of registers, twelve flip-flops, multiplier and adder. EFFECT: simplified design. 2 cl, 2 dwg, 3 tbl
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| CONVOLVER | 0 |
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