DEVICE FOR TESTING COMPUTERS Russian patent published in 1996 - IPC

FIELD: computer engineering. SUBSTANCE: device controls computation process in computers with bus architecture by means of associative comparison of instruction address for each linear part of program for instruction executed before K corresponding to beginning of linear part of program to set of instruction addresses available for given linear part of program. Available set of addresses is generated when program is translated and is stored in special memory location separately for each linear part of program. When program is executed and branch detection unit detects start of linear addresses, information about permissible addresses of instructions enters register. This information is compared by comparison circuit against address of previous instruction in program. If address which equals to last executed instruction does not belong to set of permissible ones, interrupt signal is generated and sent to processor. EFFECT: increased reliability. 8 dwg