PARALLEL CO-PROCESSOR WHICH SOLVES BOOLEAN EQUATIONS Russian patent published in 1997 - IPC

FIELD: computer engineering. SUBSTANCE: device has processor matrix, control and interface unit. Processor matrix is designed as device for parallel reading and writing with 2n address inputs, reset input and one output. Interface and control unit is designed as unit which selects register addresses and has start input, signal input, 2+2{log₂(α)}+2{log₂(m)} + {log₂(n)} load inputs, where {x} means minimal upper round integer, reset input, writing input, 2n control outputs, three solution outputs, m reading outputs and one reset output. EFFECT: increased speed of high-parallel exhaustive search of solutions due to simplified design of processor elements, decreased number of clock cycles which processor element needs for check of one variant. 10 cl, 20 dwg