FIELD: computer engineering, in particular, high-speed systems for processing of heavy data flows in real-time mode. SUBSTANCE: initial loader, address counter-register and N transputers are introduced to accomplish the goal of invention. Said transputers with first transputer are combined into matrix of transputers. Inputs and outputs of transputers in matrix are connected to adjacent transputers and/or to corresponding inputs and output of matrix of transputers. EFFECT: increased speed due to possibility to run several programs in parallel and to increase speed of access to memory unit and peripheral devices. 5 dwg
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Authors
Dates
1998-04-27—Published
1994-07-06—Filed