FIELD: analog computer engineering. SUBSTANCE: relator processor unit is designed for rank identification and selection of information (selected) signal given on five-element set of analog signals by quartile-rank flag, for tolerance check, and for signal sorting. Processor unit has single- double, and triple-channel demultiplexer relators, and double-channel multiplexer relator incorporating comparator, as well as closing and opening switches. EFFECT: enlarged functional capabilities. 3 dwg
Authors
Dates
2002-01-27—Published
2001-01-30—Filed