MULTIPLE-THRESHOLD LOGICAL UNIT Russian patent published in 2002 - IPC

FIELD: automatic control and computer engineering; digital devices. SUBSTANCE: multiple-threshold logical unit has linear adder incorporating input diodes whose anodes are connected through respective resistors to positive pole of power supply and to anodes of respective isolating diodes whose cathodes are connected to input of resistive divider, outputs of the latter being connected to first inputs of respective NAND gates that form single-threshold discriminators. Outputs of odd-numbered single-threshold discriminators are connected to inputs of multiple-input NAND gate; second input of each of the latter is connected to output of respective even-numbered single-threshold discriminator with closest high operating threshold. Second inputs of even-numbered single-threshold discriminators are connected to positive pole of power supply. Newly introduced in proposed logical unit are asynchronous RS flip-flop built around NAND gates, doubleinput NAND gate, single-shot multivibrator, and amplifier whose input is connected to linear adder output and output, to trigger inputs of single-shot multivibrator. Output of the latter is connected to first input of double-input NAND gate and to additional input of multipleinput NAND gate whose output is connected to one setting input of RS flip-flop and to second input of double-input NAND gate. Output of the latter is coupled with zero setting input of RS flip-flop whose direct output is connected to output terminal of multiple-threshold logical unit. EFFECT: provision for eliminating failure at unit output that may occur due to changes in binary sets across its inputs. 1 dwg