FIELD: computer engineering, possible use in systems for transferring digital information.
SUBSTANCE: code transformer contains counting trigger 1, transformation resolution bus 2, clock impulse bus 3, input 4 and output 5 informational buses, shift register 6, power bus 7, two AND-NOT elements 8, 9, OR element 10, element OR-NOT 11, inverter 12, majority element 13 and bus of output clock impulses 14, R-input of counting trigger 1 is connected to transformation resolution bus 2 and to second and first inputs of elements OR-NOT 11 and OR 10, respectively. Output of element OR-NOT 11 is connected to output informational bus 5, while second input is connected to direct output of counting trigger 1, clock input of which is connected to first input of element OR 10, to first input and output of majority element 13 and to bus of output clock impulses 14. Second input of majority element 13 is connected to clock impulse bus 3 and to C-input of shift register 6, D-input of which is connected to power bus 7, while R-input is connected to output of OR element. Outputs of first and third bytes of shift register 6 are connected to first input of first element OR-NOT 8 and to input of inverter 12, respectively. Second input of first element OR-NOT 8 is connected to informational bus 4, and output - to first input of second element OR-NOT 9, second input of which is connected to output of inverter 12. output of second element OR-NOT 9 is connected to third input of majority element 13.
EFFECT: decreased time need for transferring information, simplification of circuit.
1 dwg
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0 |
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DIGITAL ASYNCHRONOUS REGENERATOR OF DISCRETE SIGNALS | 0 |
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Authors
Dates
2006-08-20—Published
2005-01-31—Filed