FIELD: computer engineering.
SUBSTANCE: device contains l decoders (l = ]log2(p-1)/2[, where p - device modulus), harmonic signal generator, l controlled phase shifters, harmonic signal phasing tester, phase shifters group for fixed phase value, first coder, first decoder, first OR gate, first group of OR gates, second OR gate, second coder, (l-1) units for multiplying by constant in absolute value, l units of AND gates, second decoder, second group of AND gates, third AND gate, third coder, modulo-two adder, first unit of OR gates, second unit of OR gates, code converter to transform number x to p-x and third unit of OR gates.
EFFECT: device functionality enhancement.
3 dwg, 2 tbl, 4 ex
| Title | Year | Author | Number |
|---|---|---|---|
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|
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RU2656992C1 |
| ANALOG ENTITY TESTER | 0 |
|
SU1718189A1 |
