FIELD: electrical engineering.
SUBSTANCE: proposed method consists in conducting first phase of integration using integrator cascade (410), integrating (VS) to first numerical value (B) by binary counter (442) and memory element (441) connected with output (440) of said comparator cascade (420), converting first numerical values (B) in analogue signal (VDAC) by ADC (451), subtracting said analogue signal (VDAC) from digitised analogue value (VE), amplifying signal (VE-VDAC), with gain reflecting said first numerical value (B), conducting second phase of integration using integrator cascade (410), integrating second to obtain second numerical value (M) proportional with analogue signal, and generating second binary number reflecting low bots, adding said first (B) and second (M) numerical values to generate number (N) displaying said integrated analogue value (VE).
EFFECT: higher accuracy of conversion.
12 cl, 4 dwg
Authors
Dates
2011-09-27—Published
2008-01-22—Filed