FIELD: information technology.
SUBSTANCE: device contains a clock pulse generator, n1 multipliers, an n1 input half-adder, a shift register with a clock input, a serial input, an n1 bit parallel input, an asynchronous setup input and an n1 bit output, a parallel feedback register for an n1 bit M-sequence generator, a nonlinear generator with a 2·n2 bit initial state input and an n2 bit output, a parallel (n1+n2)-bit register, (n1+n2) buffer elements, a parallel commutation register with a (n1+n2)-bit data input and a (n1+n2)-bit output, where n1 is the number of binary bits of numbers at the output of the shift register, n2 is the number of binary bits of numbers at the output of the nonlinear generator.
EFFECT: larger volume of generated maximum sequences.
2 dwg
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Authors
Dates
2012-03-27—Published
2010-11-12—Filed