FIELD: physics, computer engineering.
SUBSTANCE: invention relates to computer facilities and can be used in high-speed arithmetic devices for execution of operations of multiplication of numbers. The device contains two blocks which have cellular structure and are divided into columns and rows, a memory element, elements of control of data recording and reading from memory. The first unit is an input one with the number of columns equal to the sum of digits of a multiplicand and multiplier and with number of rows greater than number of digits of a multiplicand by one. The second block has number of columns and number of rows equal to number of digits respectively of a multiplicand and a multiplier. Four types (OR, AND, half-adder, adder) of cells with registers are used.
EFFECT: creation of the device with higher speed and allowing to work with separate bits during their formation.
3 dwg
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Authors
Dates
2015-04-10—Published
2013-09-24—Filed