FIELD: computer equipment.
SUBSTANCE: disclosed is a cryptographic transformation method for processing a large array, packets or data streams based on a software-hardware implementation in a microprocessor of AES block coding algorithm, including conversion of initial data into structure S consisting of 16-byte blocks, with its subsequent conversion over multiple rounds of reversible transformations, performed cyclically and including sequentially executable steps of forming (KeySchedule) of round encryption keys by nonlinear expansion of secret key of AES cipher, transforming the structure S by substituting (substituting) each byte of the structure using the generated substitution table SBOX (SubBytes), followed by transforming the structure S by shifting the rows and mixing the columns, as well as conversion by adding a round key on each round, characterized by that the additional source key of Kr0 mode is pre-installed and the original AES cipher is complemented by a conjugate transformation, depending on Kr additional mode 128-bit key, which is generated from Kr0 mode source key using two-step conversion with parameters of deceleration degree of program calculations of mode key on processors of general purpose (CPU) on the basis of input data, by serial formation in cycle with preset number of rounds of cycle Nc, array of intermediate mode keys mKrc=(σ1(mKrc−1)), where c=1...Nc is next step of cycle, σ1—first deceleration transformation, and mKr0=Kr0, with subsequent formation of array of actual mode keys aKrc=σ2(mKrc), where c=0...Nc is next cycle step, and σ2 is a second deceleration transformation, based on the original data using a function based on the Frobenius transformation, wherein from each aKrc further conversion is performed, which is specified by matrix and transfer vector, after which combination of constructed transforms is used, which forms mode key of Kr, and SBOX generation is performed by conjugate transformation, depending on mode key, applied to transformation of SubBytes of original AES for generation of SBOX, based on function belonging to family of bijective hard-to-invertible functions, and built on affine transformation, applied to the function of generating S-blocks used in the original AES algorithm.
EFFECT: technical result consists in improvement of protection against software decryption of a data stream coming with large bitrates, on general-purpose microprocessors for embedded devices, including with known encryption key, as a result of application of AES conversion extensions, which depend on additional mode key and changing function of SBOX generation, with SBOX dependence on mode key and deceleration of software implementation, as well as in expansion of known technical means due to said technical solutions.
9 cl, 4 dwg
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Authors
Dates
2020-12-11—Published
2018-09-20—Filed