MULTIBIT MODULAR ADDER Russian patent published in 2023 - IPC G06F7/501 

FIELD: computer engineering.

SUBSTANCE: digital computing devices, as well as digital signal processing devices, cryptographic applications and control systems. First, the value of the expression is determined as (A+B) - P. If the resulting value is greater than or equal to zero, i.e. (A+B) – P ≥ 0, then the desired value is obtained. If the resulting value is less than zero, i.e. (A+B) – P < 0, then the desired value is obtained by repeated summation of the A and B numbers. The device contains n full single-bit adders, (n+1)-bit adder, n-bit key, where n is the device capacity, delay element, RS-trigger, NE element and 2I element.

EFFECT: increasing the speed of the device, performing the summation operation in single-bit parallel adders.

1 cl, 1 dwg