SEQUENTIAL DIVIDER OF TRINITY INTEGERS Russian patent published in 2023 - IPC G06F7/487 G06F7/537 H03K19/173 G06F7/49 

FIELD: automation and digital computing technology.

SUBSTANCE: invention is intended to increase the functionality and performance of digital computing systems. The serial divider of ternary integers comprises a block of control logic, shift and summation/subtraction control 13, a controlled full adder-subtractor 8, a divider 2, 2⋅N- bit universal registers 3, 11 of the dividend with parallel loading and the ability to sequentially shift to the left, towards the most significant bits, in the lower bits of which, as a result of the division procedure, the quotient is formed, and in the higher ones the remainder is formed, N-bit digital comparator 4, subtraction cycle counter to two 10, an inverter of the subtraction-addition control signal 9, a ternary logical element MAX 6, a flip-flop storing the result of the previous subtraction operation 12, and digital switches of ternary logical signals 1, 5, 7. All elements are made on the basis of ternary logic.

EFFECT: hardware simplification of an unsigned divisor circuit capable of performing the function of dividing integer ternary numbers in a symmetric ternary number system.

1 cl, 2 dwg