FIELD: computer engineering. SUBSTANCE: device has three commutator matrixes which sizes are Hx(H+1), memory unit matrix which size is Hx(H+2), H devices for input-output control, H multiplexers, H output units, H input units, second group demultiplexers matrix which size is Hx(H+1) and H NOT gates. EFFECT: increased speed due to processing tasks which are partially parallel. 14 dwg
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Authors
Dates
1994-01-30—Published
1991-06-24—Filed