FIELD: automation and computer engineering, in particular, design of control computing systems and manufacturing control systems. SUBSTANCE: device has n*m identical units, where n is number of lines, m is number of columns, . Each i-th unit (i is in range of 1, n*m) has program memory unit, buffer memory unit for messages, analysis unit, address commutator, address register, register of instructions, multiplexer of logical conditions, synchronization unit, first and second units of AND gates, AND gate. Goal of invention is achieved by introduced three program memory units, program choice multiplexer, operation algorithm selection unit, OR gate. EFFECT: increased field of application due to possibility of reconfiguration in case of fault units. 5 cl, 16 dwg, 5 tbl
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Authors
Dates
1998-11-20—Published
1997-09-09—Filed