FIELD: computer engineering. SUBSTANCE: device has multiplication unit 1, counter 2, multiplexer 3, two delay gates 4, 5, six OR gates 6-11, memory unit 12, switches unit 13, adder 14, subtraction unit 15, three comparison circuits 16-18 and two registers which are connected to each correspondingly. EFFECT: increased speed. 1 dwg
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Authors
Dates
1994-01-30—Published
1991-02-04—Filed