FIELD: computer engineering. SUBSTANCE: device has multiplication unit 1, multiplexer 2, three OR gates 3, 4, 5, two registers 6, 7, memory unit 8, switches unit 9, adder 10, subtraction unit 11, two comparison circuits 12 and 13 and delay gate 14. EFFECT: increased speed. 1 dwg
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Authors
Dates
1994-01-30—Published
1991-04-30—Filed