FIELD: computer engineering. SUBSTANCE: device has n operational units where n is size of input matrix x[n, n] , and input unit. Operational unit has 2n+3 registers, multiplier, adder, nine flip-flops, fifteen groups of AND gates, six groups of OR gates, eight AND gates, twelve OR gates, NOR gate, three NOT gates. EFFECT: simplified design. 3 tbl, 4 dwg
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