FIELD: computer engineering. SUBSTANCE: device has L processing units, input units, L combinatorial adders, (L-1) register, flip-flop, (L + 1) comparison unit, L groups of AND gates, L groups of OR gates, NOR gate, OR gate. L=τ+R, where τ is dimension of input matrix, R is number of redundant units. Device provides parallel-serial computations with hardware control, skipping and replacing fault processing units. EFFECT: increased reliability due to checking and redundancy, increased functional capabilities. 3 cl, 4 dwg, 5 tbl
| Title | Year | Author | Number |
|---|---|---|---|
| DEVICE FOR MULTIPLICATION OF THREE MATRICES AND CALCULATION OF TWO-DIMENSIONAL DISCRETE FOURIER TRANSFORM | 1993 |
|
RU2066878C1 |
| DEVICE FOR CONVOLUTION CALCULATION | 1993 |
|
RU2112274C1 |
| DEVICE FOR MULTIPLICATION OF TWO MATRICES | 1993 |
|
RU2049352C1 |
| DEVICE FOR SOLVING SYSTEMS OF LINEAR ALGEBRAIC EQUATIONS | 1993 |
|
RU2049350C1 |
| DEVICE FOR CALCULATION OF EIGENVALUES FOR N*N MATRIX | 1993 |
|
RU2117987C1 |
| DEVICE FOR SOLVING SYSTEMS OF LINEAR ALGEBRAIC EQUATIONS | 1993 |
|
RU2051412C1 |
| DEVICE FOR CALCULATION OF TWO-DIMENSIONAL CONVOLUTION | 1993 |
|
RU2117986C1 |
| DEVICE FOR COMPUTATION OF TWO-DIMENSIONAL CONVOLUTION | 1993 |
|
RU2049353C1 |
| DEVICE FOR INVERTING N X N MATRICES | 1990 |
|
RU2037199C1 |
| DEVICE FOR DYNAMIC CHANGING OF MEMORY ADDRESSES | 1993 |
|
RU2115160C1 |
