FIELD: communications. SUBSTANCE: device has (2n-1)-bit shift register 1, first and second NOR gates 2 and 3, OR gate 4, switch 5, n-bit shift register 6, AND gate 7, controlled inverter 8, modulo-two adder 9. This results in possibility to increase number of decoded signals due to recognition of direct and inverse M-sequences. EFFECT: increased functional capabilities. 1 dwg
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Authors
Dates
1994-04-30—Published
1991-06-03—Filed