FIELD: computer technology. SUBSTANCE: during test checking of the memory, defective memory cells are clamped in address code registers. Digits are marked in clamped address codes, which have constant unit and zero values. These values are inverted subsequently. Order numbers of digits of address are changed by switching address buses in such a way, that marked digits would correspond to senior digits of memory address. These digits are clamped by unit values in senior digits of register in area of defective memory. During operation, input address code is compared with code, fixed in register of defective area of memory. If this code is less than input one, "INVALID ADDRESS" signal is generated, which blocks access to memory. EFFECT: improved efficiency. 4 dwg, 2 tbl
Title | Year | Author | Number |
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0 |
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SU1785001A1 | |
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DEVICE FOR MONITORING MICROPROCESSOR | 0 |
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FIRMWARE DEVICE FOR COMPUTER CHANNEL CONTROL | 0 |
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ARITHMETIC-LOGIC UNIT WITH BUILT-IN DIAGNOSTIC CHECKING | 0 |
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Authors
Dates
1994-09-30—Published
1990-08-23—Filed