DEVICE FOR CONTROL OF MEMORY UNIT Russian patent published in 1995 - IPC

Abstract RU 2037874 C1

FIELD: computer engineering. SUBSTANCE: device has two decoders, five bus shapers, five read-only memory unit, three counters, four registers, flip-flop, comparison circuit, seven AND gates, fourteen AND gates, two univibrators, four delay gates, multiplexer, information input- output, address input, input of information replacing mode, input of full reconfiguration mode, input of partial reconfiguration mode, instruction selection input, initial setting input, writing input, reading input, setting input for replaced information type, input for permission of change of replaced information address, group of registers, group of multiplexers, adder, NOT gate, NOR gate, reverse multiplexer, group of delay gates. EFFECT: decreased memory usage, increased speed. 2 dwg

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RU 2 037 874 C1

Authors

Kharitonov Valerij Alekseevich

Olejnikov Aleksej Vladimirovich

Tjurin Sergej Feofentovich

Zverev Aleksej Petrovich

Grevtsev Aleksandr Mikhajlovich

Jakovlev Sergej Vasil'Evich

Popchenko Oleg Grigor'Evich

Raevskij Viktor Nikolaevich

Dates

1995-06-19Published

1993-05-10Filed