FIELD: computer engineering. SUBSTANCE: device has clock oscillator 1, n frequency dividers 2-1, ..., 2-n, control line 3, n initial state setting inputs 4-1, ..., 4-n, n pulse counters 5-1, ... 5-n, n RS flip-flops 6-1, .. . , 6-n, prohibition input 7, additional pulse counter 8, K delay gates 9-1, . . . , 9-K, information input 10, output 11. Delay unit has n memory units 12-1, . .., 12-n, first NAND gate 13, three D flip-flops 14, 15, 16, second NAND gate 17, AND gate 18, fourth D flip-flop 19. Device may be used in information gathering instruments, devices for analysis of temporal structure of pulse sequences, devices which predicts periodic and random sequences. EFFECT: increased functional capabilities. 2 cl, 3 dwg
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Authors
Dates
1997-01-27—Published
1993-09-27—Filed