FIELD: computer engineering, in particular, devices for continuous counting of real time and measuring elapsed time for processor operations. SUBSTANCE: device has commutators, control unit, comparison unit, counter, information bits memory unit, check sum memory unit, register, unit for expectation of carries, unit for expectation of byte parity, unit for generation of device state signals, modulo two convolution gate, OR gate and testing unit. EFFECT: increased stability to single noise pulse. 2 cl, 5 dwg
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DEVICE FOR READING TIME | 0 |
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SU1817085A1 |
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0 |
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SU1784959A1 | |
FAILURE-RESISTANT MULTIPLIER | 1991 |
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DIVIDER | 1991 |
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Authors
Dates
1997-05-10—Published
1990-06-14—Filed