FIELD: automation and computer engineering, in particular, interrupt processing devices, data flow control, generation of memory address of data banks in processors. SUBSTANCE: device has request register 1, first priority unit 3, first encoder 9, second priority unit 11, second encoder 16, L AND gates groups 18, first OR gates group 19, second OR gates group 20. First priority unit 3 is identical to second priority unit 11 and has flip-flop 22, first OR gates group 25, first OR gate 26, priority code register 27, decoder 28, third AND gates group 29, fourth AND gates group 30, fifth AND gates group 31, second AND gates group 32, sixth AND gates group 33. EFFECT: increased functional capabilities. 2 dwg, 2 tbl
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Authors
Dates
1997-08-20—Published
1993-11-02—Filed