DYNAMIC PRIORITY DEVICE Russian patent published in 2000 - IPC

FIELD: computer engineering and automatic control, in particular, interrupt generators, data flow controllers, generators of data bank addresses in logical processors. SUBSTANCE: device has request register, priority unit, two groups of OR gates, group of AND gates, two OR gates, n l-bit priority registers, n groups of bit AND gates. Goal of invention is achieved by introduced AND gate, OR gate, (n+1) priority registers, (n+2) logical units, each of which has two groups of AND gates, group of AND gates, group of OR gates, three gates, two AND gates, delay gate 32. EFFECT: increased field of application, simplified design. 6 dwg