ADDRESS SHAPER BUILT AROUND MIS TRANSISTORS Russian patent published in 1997 - IPC

FIELD: digital computer engineering; integrated circuits using MIS transistors. SUBSTANCE: address shaper has transistor switch 1 whose gate functions as address input 2 of device, transistor switches 3, 4, 5, 6 whose gates are combined and function as enable input 7, as well as transistor switches 8-14, loading transistors 15-20, first charging and discharging output transistors 21 and 22, respectively, whose sources and drains are combined and function as direct output of shaper, second charging and discharging output transistors 24 and 25, respectively, whose sources and drains are combined and function as inverted output of shaper. Drains of transistor switch 6, loading transistors 15, 16, 17, 18, and first and second charging transistors 21 and 24 are connected to power bus. Sources of transistor switches 1, 4, 5, 8, 11, first and second discharging transistors 22 and 25 are connected to zero-potential bus. EFFECT: improved reliability of storage device under pulse noise conditions. 6 dwg