Patenton — panteon of patents

(19)

RU

(11)

2 090 925

(13)

C1

(51)

IPC

(21) (22)

Application

5045660/09, 1992-04-07

(22)

Actual filing date

1992-04-07

(45)

Published

1997-09-20

(72)

Inventor

Poljan L.E.Uger V.G.

(73)

Holder

Tsentral'Nyj Nauchno-Issledovatel'Skij Institut Svjazi

ADDER UNIT Russian patent published in 1997 - IPC

Abstract RU 2090925 C1

FIELD: computer engineering; adding analog and digital quantities. SUBSTANCE: newly introduced in device are modulo-two adder 12 and flip-flop 13 which are inserted, together with AND-NOT-OR gates 1, 4 and NAND gate 3, between input and output buses. EFFECT: improved accuracy of addition and speed, reduced power requirement. 1 dwg, 1 tbl

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RU 2 090 925 C1

Authors

Poljan L.E.

Uger V.G.

Dates

1997-09-20—Published

1992-04-07—Filed

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