FIELD: control systems. SUBSTANCE: device has input unit 1, switching-computing unit 2, which has decoder 3, 2 - 2 AND - 2 OR gate 4, XOR gates 5, 10, AND gates 6, 8, 9, 12, memory registers (flip-flops) 7, 13, OR gate 11, NOT gate 14, output unit 15, memory unit 16, synchronization unit 17, control unit 18, pulse generator 19. EFFECT: increased speed due to decreased number of clock cycles for calculation of logical functions. 8 dwg
