APPARATUS FOR SUBTRACTING BY MODULUS Russian patent published in 1999 - IPC

FIELD: automatic and computing technique, possibly computers, operational systems. SUBSTANCE: apparatus includes third and fourth groups of OR-gates, second switching device, first and second AND-gates, ring shift register, OR-gate, counter, OR-NO gate, inhibition gate, unit of AND-gates. Each operand is decreased by K times. Received result is multiplied by K times with respective correction. Depending upon relation of Amodk and Bmodk (A, B -operands) number of logic gates required for realization of apparatus is decreased. EFFECT: lowered number of circuit units. 1 dwg, 2 tbl