FIELD: network clock synchronization engineering.
SUBSTANCE: proposed pulse phase jitter compensator is built around PLL and has newly introduced internal pulse modulator, phase inverter, and delay line affording complete compensation for sync pulse phase jitter in network clock synchronization.
EFFECT: minimized effectiveness of network clock synchronization.
1 cl, 1 dwg
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Authors
Dates
2005-09-27—Published
2004-06-07—Filed