FIELD: computer engineering, possible use for synthesis of arithmetical and logical devices, for creating fast action and highly productive digital devices which realize the function of multiplication in direct codes.
SUBSTANCE: multiplier contains data input block, multiplicand register block, multiplier register block, addition block, decoder block, result storage block, control block. In multiplier unit, multiplication of binary numbers is performed. The sign of result of multiplication is determined by modulo two addition of signs of multiplicand and multiplier. The operation of multiplication is realized by analyzing lower bits of multiplier, shifting the multiplier for two bits to the right, shifting the multiplicand to the left. The result of multiplication of numbers is produced as a total of partial results of multiplication.
EFFECT: increased speed of operation, increased reliability of operation, simplification of algorithm of operation of device control block.
11 dwg
Title | Year | Author | Number |
---|---|---|---|
COMPUTING PUBLIC EVOLUTIONARY ASYNCHRONOUS MODULAR SYSTEM | 2009 |
|
RU2453910C2 |
MULTIPLIER BASED ON NEURONS | 2003 |
|
RU2249845C1 |
ARITHMETIC COMPUTING DEVICE | 2004 |
|
RU2292580C2 |
DEVICE FOR MULTIPLYING THE FLOATING POINT NUMBERS | 0 |
|
SU1280624A1 |
DEVICE FOR MULTIPLYING BINARY NUMBERS | 0 |
|
SU981996A1 |
DEVICE FOR EXECUTING MULTIPLICATION AND DIVISION OPERATIONS | 0 |
|
SU955038A1 |
COMPUTING DEVICE | 0 |
|
SU1545215A1 |
0 |
|
SU482741A1 | |
MULTIPLIER | 0 |
|
SU1753471A1 |
ARITHMETIC UNIT | 0 |
|
SU1236473A1 |
Authors
Dates
2008-04-20—Published
2006-04-03—Filed