FIELD: physics; computer engineering.
SUBSTANCE: IC protection module component is proposed, which comprises at least two processors CPU A and CPU B, each of which is connected to memory ROM A and ROM B, with electrically erasable programmable read-only memory (EEPROM) EEPROM A and EEPROM B containing data, and with random access memory (RAM) RAM A and RAM B used as temporary data storage during processing. The first processor CPU A is connected through an interface bus to systems outside the IC component. The said module component is distinguished by that, the second processor CPU B is connected to the first processor CPU A through dual-port random access memory DPR. EEPROM A of the first processor CPU A is accessible for the said first processor CPU A only for reading (R), and the second processor CPU B has reading and writing access (R/W) to the said EEPROM A of the first processor CPU A.
EFFECT: improved optimal method of protecting smart cards from unauthorised control with a cryptographic processor or processors using external signals which interfere with normal functioning of such a processor or processors.
10 cl, 1 dwg
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Authors
Dates
2009-12-27—Published
2005-06-02—Filed