SINGLE-DIGIT BINARY SUMMATOR Russian patent published in 2011 - IPC G06F7/50 

Abstract RU 2408922 C1

FIELD: information technologies.

SUBSTANCE: device comprises 10 field transistors of P-type conductivity, 10 field transistors of N-type conductivity, inputs of summands A and B, input of transfer CIN, outputs of supply of high and low voltage levels, the first inverter, output of which is the output of the transfer signal COUT, the second inverter, output of which is the output of the summation result S, double-input logical element AND-NOT and double-input logical element OR-NOT.

EFFECT: increased efficiency of transfer signal generation, due to reduction of capacitance loads in circuit of signal passage from input of transfer CIN to output COUT.

1 dwg, 1 tbl

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Authors

Shubin Vladimir Vladimirovich

Lebedev Jurij Pavlovich

Dates

2011-01-10Published

2009-05-18Filed