FIELD: information technologies.
SUBSTANCE: device comprises a unit of data registers arranged with the possibility of parallel and serial data loading, and a switching matrix with baseline topology. The device comprises n data outputs, formed by outputs of data registers unit, m binary inputs of control signals, to which random signals are supplied from external sources, input S of serial download of initial line of reinstalled data A1 - An, formed by an input of serial downloading of data registers unit, a binary unit to control serial and parallel recording of data into a unit of data registers PE, input of clock pulses of data registers unit clk. Parallel q digit outputs of data registers unit are electrically connected with q digit inputs of the switching matrix, outputs of the switching matrix are electrically connected to parallel q digit inputs of data registers unit.
EFFECT: improved device efficiency.
4 dwg
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Authors
Dates
2011-08-27—Published
2010-01-25—Filed