FIELD: information technologies.
SUBSTANCE: device comprises a unit of bit transposition code registers and two groups of identical blocks, every of which comprises the following components serially connected via data buses: an initial line register, a bit transposition decoder, a unit of bit transposition assembly and a resulting line register.
EFFECT: accelerated process of controlled shift of initial data line bits with length N due to parallel conversion per single cycle of a clock pulse generator and double data buffering.
3 dwg
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0 |
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PROCESSOR | 0 |
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Authors
Dates
2012-01-10—Published
2009-12-22—Filed