FIELD: information technologies.
SUBSTANCE: device comprises a unit of bit transposition code registers and two groups of identical blocks, every of which comprises the following components serially connected via data buses: an initial line register, a bit transposition decoder, a unit of bit transposition assembly and a resulting line register.
EFFECT: accelerated process of controlled shift of initial data line bits with length N due to parallel conversion per single cycle of a clock pulse generator and double data buffering.
3 dwg
| Title | Year | Author | Number | 
|---|---|---|---|
| DECODER FOR CONTROLLED REARRANGEMENT OF INFORMATION STORED ON PERSONAL COMPUTER | 2008 | 
 | RU2390052C2 | 
| PARALLEL DECODER FOR CONTROLLED TRANSPOSITION OF INFORMATION STORED ON PERSONAL COMPUTER | 2008 | 
 | RU2390049C1 | 
| VIRTUAL MEMORY CONTROL DEVICE | 0 | 
 | SU955076A1 | 
| VIRTUAL MEMORY CONTROL DEVICE | 0 | 
 | SU1023336A1 | 
| APPARATUS FOR CROSS-CLUSTER CONTROLLED REARRANGEMENT OF INFORMATION STORED ON PERSONAL COMPUTER | 2009 | 
 | RU2409842C1 | 
| DEVICE OF CONTROLLED CYCLIC SHIFT | 2009 | 
 | RU2419174C1 | 
| 0 | 
 | SU1783630A1 | |
| PROCESSOR | 0 | 
 | SU1247884A1 | 
| STORAGE WITH MULTIFORMAT DATA ACCESS | 0 | 
 | SU1108507A1 | 
| CONTROL DEVICE FOR INTERNAL MEMORY | 0 | 
 | SU1291992A1 | 
Authors
Dates
2012-01-10—Published
2009-12-22—Filed