FIELD: information technology.
SUBSTANCE: generator contains (2n) n-bit memory registers, (2n-2) OR circuits, (2n-2) AND circuits, 2(2n-2) inhibitor circuits, a decoder, a clock pulse generator whose output is connected to the first inputs of the first and second memory registers, the first inputs of the third and so forth (2n)-th register through second inputs and outputs of corresponding inhibitor circuits, outputs of the decoder are connected to first inputs of corresponding inhibitor circuits, the output of the first register is connected to the second input of the second memory register, the output of the second register is connected through the second input and output of an inhibitor circuit to the second input of the third register and through the second input and output of the first AND circuit to the first input of the first OR circuit, the output of which is connected through the first output of the circuit to the second input of the first register and so forth, the output of the (2n-1)-th register is connected to the second input of the (2n)-th memory register. The generator also contains a parity check unit which is connected to the output of the first OR circuit, the first output of which is connected to the second input of the first register, and the second output is connected to the decoder through an additional analysis unit.
EFFECT: high information security owing to generation of bijective functions by sequences of n-ary binary elements from a Galois field.
2 dwg
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Authors
Dates
2012-03-27—Published
2010-06-23—Filed