LOGIC MULTICONTROLLER HAVING DISTRIBUTED PARALLEL-PIPELINE BARRIER SYNCHRONISER Russian patent published in 2012 - IPC G06F9/00 

FIELD: information technology.

SUBSTANCE: logic multicontroller having a distributed parallel-pipeline barrier synchroniser has M*N single-type modules, a program memory unit, an address register, a command register, a boolean condition multiplexer, an address switch, a synchronisation unit, first to third OR elements, a conformity vector register, a buffer register, first and second synchronisation peak number decoders, a block of OR elements, first and second univibrators, a first delay element, first and second groups of AND elements, a group of p synchronisation control units, a configuration flip-flop, an AND element, a flip-flop, second and third delay elements, first and second active group number counters, first and second active group number decoders, fourth and fifth OR elements, first and second groups of OR elements.

EFFECT: high speed of performing barrier synchronisation of sections of parallel programs.

3 cl, 6 dwg