FIELD: information technology.
SUBSTANCE: method is realised by executing any of the functions of the type ext1(x1,ext2(x2,ext3(x3, x4))), where x1, x2, x3, x4 are input analogue signals; extm=max or extm=min, while maintaining high speed of operation. The relator unit is designed to reproduce noniterated functions of infinite-valued logic and can be used in analogue computer systems as an information preprocessing means. The relator unit has six relators (l1,…, l6), each having a comparator (2), an XOR element (3), a closing switch and an opening switch (41 and 42). Use of said relators enables to execute any of the functions of the type ext1(x1,ext2(x2,ext3(x3, x4))), where x1, x2, x3, x4 are input analogue signals; extm=max or extm=min
EFFECT: broader functional capabilities.
1 dwg
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RELATOR UNIT | 2013 |
|
RU2518664C1 |
RELATOR MODULE | 2011 |
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RELATIONAL PROCESSOR FOR ADDRESS-RANK IDENTIFICATION, SELECTION AND RANKING OF THREE ANALOG SIGNALS | 1999 |
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RELATOR PROCESSOR UNIT FOR IDENTIFYING AND SELECTING QUARTILE VALUES OF INFORMATION SIGNAL GIVEN ON FIVE-ELEMENT SET OF SIGNALS | 2001 |
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RELATOR UNIT | 2012 |
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RU2491625C1 |
RELATOR SELECTOR | 2005 |
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RU2294594C1 |
Authors
Dates
2013-08-20—Published
2012-07-03—Filed